1. Field of the Invention
The present invention relates to an optical coupling device and method operative in a bidirectional data transmission link. An optical coupling serves to provide voltage isolation, also known as galvanic isolation, between communicating devices which are located at respective ends of a data transmission link. Generally, an optical data coupling is implemented with one or several opto-isolators, each comprising a light emitting diode (LED) and a phototransistor operating in tandem. The separation between the LED and phototransistor defines an electrically isolated optical path. The LED acts as a photon flux source and is activated by the sending device to produce a signal carrying modulation. This modulation by illumination is detected by the phototransistor, which acts as a photon flux detector, connected the receiving device. In this way, a suitable modulated signal applied to the LED by a sending device can be reproduced across the isolated separation by the phototransistor to which the receiving device is connected.
2. Prior Art
For the purpose of illustrating a possible data exchange application involving opto-isolators for voltage protection, FIG. 1 shows first and second communicating systems 2 and 4 exchanging data bidirectionally through an in IR data link 6. In the example, the first system is a microcontroller application board for a high-voltage application 8, e.g. a motor, lighting system, domestic appliance, etc. The function of the microcontroller application board is to reproduce different operating conditions in response to real time command signals from the second system 4, and to deliver to the latter feedback data on various parameters of the high-voltage application. The second system, designated main command system 4, is composed of a main command personal computer (PC) 12 programmed to enable users to enter real-time commands to the high-voltage application through a keyboard 14, e.g. for programming the high-voltage application board, and to view the resulting parameters fed back from the high-voltage application 8 on a monitor screen 16.
The high-voltage application 8 has a simple input/output interface 18 through which operating commands and feedback back data are exchanged locally with a microcontroller 20 on the high-voltage application board. The exchange of data between the interface 18 and microcontroller 20 is through an internal wire two-way wire link 22 in accordance with a chosen protocol.
The command data from the main command system 4 and the feedback data-from the high-voltage application 8 are relayed via the internal microcontroller 20, the latter serving to reformat the information according to the protocols used by the high-voltage application 8 and main command PC 12.
The elements forming the high-voltage application board 2 are all powered from an AC line (mains) source e.g. at 110V ac. The line input is fed directly—without using a transformer—to the input of a full-wave rectifier bridge 26 composed of four rectifier diodes RD1-RD4. The rectified output of the bridge 26 is smoothed by a capacitor C and taken to the input of a self-powered DC-DC converter 28.
The DC-DC converter 28 chops and mixes the rectified output to produce a low voltage Vdd to power the microcontroller 20, the interface 18 of the high-voltage application 8, and possibly other components of the board 2, such as signalling diodes, etc. The high voltage for powering the high-voltage application is taken directly from the charged plate of the capacitor C.
As is typical with most low-cost transformerless implementations, the power supply for the microcontroller 20, in this case the DC-DC converter 28, is not fully isolated from the AC line source 24. Specifically, the ground reference line 30 for the microcontroller is wire connected to the ground or neutral of the AC line source via the rectifier bridge 26. This type of ground connection would raise a problem if it were attempted to connect the ground of the microcontroller 20 directly to the ground of the main command PC 12 or other part of the main command system 4, since the chassis of the latter could then be at a potential which is dangerous either for a user or for the circuitry.
Accordingly, the command system 4 is electrically insulated from high-voltage application board 2 by a system of opto-isolators in the signal link for the commands and feedback information. Typically, the opto-isolator is of the logic type, i.e. it operates on two logic states corresponding to an on and off states (i.e. conducting and non conducting states) for the transmission of digital data.
If the protocol for the signal link uses two separate paths respectively for sending and receiving, e.g. as in the RS232 serial transmission protocol, then the isolation can be achieved relatively simply by two opto-isolators to form the IR communications link 6, as illustrated in FIG. 1. The first opto-isolator is composed of a command-sending light emitting diode 34, on the main command system 4 and a command receiving phototransistor 38, on the high-voltage application board 2. Likewise, the second opto-isolator is composed of a feedback-receiving phototransistor 42, on the main command system 4 and a feedback-sending light detecting diode 46, on the high-voltage application board 2.
In this way, the optical paths for each direction are kept separate and can operate independently of each other.
However, with some protocols, an individual signal needs to be bidirectional over a common wire. This case is illustrated by FIG. 2, which represents the same application as for FIG. 1, but with a bidirectional bus system 48 for conveying the commands and feedback information, of the type in which data can flow along both directions along a single common wire path between the microcontroller 20 and main command PC 12. An example of such a bus system is a serial bus working under a protocol referred to as the In-Circuit Communication (acronym ICC) protocol, proprietary to STMicroelectronics.
Under these circumstances, opto-isolators cannot be interposed in the data wire path to obtain the isolation, since they are designed to pass information along one direction only.
Likewise, opto-isolators cannot be used either in applications where a command link may be connected by a single wire or a common group of wires to several addressable sending or receiving units, where each link is joined to an arbitrary number n of open-collector outputs of n respective sending and receiving units via pull-up or pull-down resistors and the signal can be imposed from either end of the link.
The problem that arises in attempting to use opto-isolators to exchange data bidirectionally along a single path is illustrated by FIG. 3, which shows a hypothetical circuit produced for the purpose of explaining the problem. In the Fig., two communicating units A and B are arranged each to send and receive data through a common bidirectional serial data wire DCL of a common serial data link. The latter can be the bidirectional bus of FIG. 2, units A and B being e.g. respectively the high-voltage application board 2 and the main command system 4.
In the illustrated example, a unit sends information by pulling the common data link DCL to a predetermined logic level, the latter being detected as a data bit by the other unit at the receiving end.
To this end, each unit has a transmission terminal (TxA for unit A and TxB for unit B) and a receiving terminal (RxA for unit A and RxB for unit B), both depending from the common data link DCL. Specifically, the receiving terminal is taken from the common data link DCL via a buffer amplifier (50A for unit A, 50B for unit B), and the transmission terminal Tx is connected to the common data link via a transmission FET transistor switch (52A for unit A, 52B for unit B). The latter has its gate connected to its respective transmission terminal, its source connected to ground and its drain connected to the common data link DCL.
The two units A and B are mutually electrically isolated by two identical opto-isolators 54 and 56. As shown in FIG. 4, each opto-isolator 54 or 56 is in the form of a package comprising a light emitting diode (LED) 58 and a phototransistor 60, mutually positioned so that IR light from the LED can illuminate the phototransistor. The phototransistor 60 is non conducting between its collector and emitter when not illuminated by the LED 58, and conducting between its collector and emitter when illuminated by the LED. The opto-isolator thus operates according to two states, i.e. as a logic type opto-isolator. For an opto-isolator, the terminals of the package for connection are thus the anode and cathode of the LED 58 for sending data and the collector and emitter of the phototransistor 60 for receiving data. The base of the phototransistor is activated by the light from its associated LED.
In FIG. 3, each unit A and B is cabled to a LED of one opto-isolator and to a phototransistor of the other. A LED or phototransistor cabled to a particular unit is identified by its Fig. reference followed by a suffix A or B depending on whether it is cabled to unit A or B respectively.
For unit A, LED 58A has its anode connected to the unit's positive power supply voltage Vdd via a pull-up resistor 62A, and its cathode connected both to the input of buffer 50A and to the collector of phototransistor 60A. The latter has its emitter connected both to ground and to the source of FET transistor 52A.
Correspondingly, for unit B, LED 58B has its anode connected to the unit's positive power supply voltage Vdd via a pull-up resistor 60B and its cathode connected both to the input of buffer 50B and to the collector of phototransistor 60B. The latter has its emitter connected both to ground and to the source of FET transistor 52B.
The pull-up resistors 62A and 62B serve to bias the common data link DCL to a voltage of Vdd minus the photodiode threshold voltage, i.e. the voltage drop across diode 62A or 62B when forward biased. This voltage is made to correspond to a logic 1 state on the common data link DCL.
If unit A, say, needs to send one bit of data to unit B, then input TxA of unit A is set momentarily for the duration of a clock cycle from a normally 0 logic state to logic 1 (for an NMOS type of FET). The corresponding high voltage on the gate of FET 52 makes the latter conducting, producing two effects:                i) it forces the common data link DCL of unit B to substantially ground potential, and thus to logic 0 (the resistance of the phototransistor 60A or 60B is much less than that of pull-up resistor 62A or 62B). This transition to logic 0 is detected at terminal RxB of unit B as a data bit;        ii) it creates a current flow path from Vdd to ground via pull-up resistor 62A, LED 58A and the FET 52A itself. LED 58A thus becomes suitably biased to illuminate phototransistor 60B of unit B, making that phototransistor conductive. The selective switching on and off of transistor 52A can be expected in this way communicate data bits to common data link DCL at the level of unit B.        
By symmetry, unit B can send data bits to unit A by selectively switching on and off of transistor 52B to force to logic 0 the common data link DCL at the level of unit A correspondingly at each switching of its FET 52B.
Note that when one unit is sending data, its own receiving terminal Rx at the common link DCL is also pulled to ground by the conducting state of the FET of that unit.
However, the circuit of FIG. 3 will fail since whenever one of the units A or B attempts to send data, there is created a lock up situation in which each of the two LEDs 58A and 58B switch on and remain on.
For instance, assume that unit A attempts to send data by making its FET 52A conducting (applying a logic 1 on the gate). Diode 58A of unit A shall then illuminate and make phototransistor 60B of unit B conducting, so bringing the potential at the cathode of LED 58B substantially to ground potential (more precisely, to ground potential plus the collector-emitter voltage drop across phototransistor 60B at saturation). LED 62B of unit B is thereby also biased to illuminate, and thereby causes phototransistor 60A of unit A conducting. The current flow path to ground provided by that phototransistor 60A creates a current path through LED 58A of the first unit separate from that of the FET 52, and therefore irrespective of whether the FET 52A of the latter is conducting or non conducting. Thus, each LED mutually causes the other to remain locked on.
By symmetry, the situation is identical, in reverse, if the transmission terminal TxB of unit B is activated. In this case the illuminated state of LED 58B causes the illuminated state LED 58A, the latter forcing LED 58B to remain illuminated.